1. Field of the Invention
One embodiment of the invention disclosed herein relates to a semiconductor device including a semiconductor element.
2. Description of the Related Art
Memory devices including semiconductor elements, which are included in the category of semiconductor devices, are broadly classified into two categories: volatile memory devices that lose stored data when not powered, and nonvolatile memory devices that hold stored data even when not powered.
A typical example of volatile memory devices is a dynamic random access memory (DRAM). A DRAM stores data in such a manner that a transistor included in a storage element is selected and charge is held in a capacitor.
When data is read from a DRAM, charge in a capacitor is lost according to the above-described principle; thus, another writing operation is necessary every time data is read out. Moreover, a transistor included in a memory element has leakage current (off-state current) between a source and a drain in an off state or the like and charge flows into or out of the transistor even if the transistor is not selected, which makes a data holding period short. For that reason, writing operation (refresh operation) is necessary at predetermined intervals, and it is difficult to sufficiently reduce power consumption. Furthermore, since stored data is lost when power supply stops, another memory device utilizing a magnetic material or an optical material is needed in order to hold the stored data for a long time.
Another example of volatile memory devices is a static random access memory (SRAM). An SRAM holds stored data by using a circuit such as a flip-flop and thus does not need refresh operation, which is an advantage over a DRAM. However, cost per storage capacity is high because a circuit such as a flip-flop is used. Moreover, as in a DRAM, stored data in an SRAM is lost when power supply stops.
A typical example of nonvolatile memory devices is a flash memory. A flash memory includes a floating gate between a gate electrode and a channel formation region in a transistor and stores data by holding charge in the floating gate. Therefore, a flash memory has advantages in that the data holding period is extremely long (semi-permanent) and refresh operation which is necessary to volatile memory devices is not needed (e.g., see Patent Document 1).
However, in a flash memory, there is a degradation problem in that a memory element becomes unable to function after a predetermined number of writing operations because a gate insulating layer included in the memory element deteriorates due to tunneling current generated in writing operations. In order to reduce the effects of this problem, a method in which the number of writing operations is equalized among memory elements can be employed, for example, but a complex peripheral circuit is needed to realize this method. Moreover, even when such a method is employed, the fundamental problem of lifetime cannot be resolved. In other words, a flash memory is not suitable for applications in which data is frequently rewritten.
In the flash memory, in order to increase storage capacity, a “multilevel” flash memory that stores data with greater than two stages in one memory cell is proposed (e.g., see Patent Document 2).